\doxysubsubsubsection{UART DMA Tx }
\hypertarget{group___u_a_r_t___d_m_a___tx}{}\label{group___u_a_r_t___d_m_a___tx}\index{UART DMA Tx@{UART DMA Tx}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___d_m_a___tx_gaa318cc9c1aa55acc5bb93f378ac7d8e4}{UART\+\_\+\+DMA\+\_\+\+TX\+\_\+\+DISABLE}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___d_m_a___tx_gab1c3e8113617fb9c8fc63b3f3d7c8c65}{UART\+\_\+\+DMA\+\_\+\+TX\+\_\+\+ENABLE}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\+\_\+\+CR3\+\_\+\+DMAT}}
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___u_a_r_t___d_m_a___tx_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___u_a_r_t___d_m_a___tx_gaa318cc9c1aa55acc5bb93f378ac7d8e4}\index{UART DMA Tx@{UART DMA Tx}!UART\_DMA\_TX\_DISABLE@{UART\_DMA\_TX\_DISABLE}}
\index{UART\_DMA\_TX\_DISABLE@{UART\_DMA\_TX\_DISABLE}!UART DMA Tx@{UART DMA Tx}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_DMA\_TX\_DISABLE}{UART\_DMA\_TX\_DISABLE}}
{\footnotesize\ttfamily \label{group___u_a_r_t___d_m_a___tx_gaa318cc9c1aa55acc5bb93f378ac7d8e4} 
\#define UART\+\_\+\+DMA\+\_\+\+TX\+\_\+\+DISABLE~0x00000000U}

UART DMA TX disabled \Hypertarget{group___u_a_r_t___d_m_a___tx_gab1c3e8113617fb9c8fc63b3f3d7c8c65}\index{UART DMA Tx@{UART DMA Tx}!UART\_DMA\_TX\_ENABLE@{UART\_DMA\_TX\_ENABLE}}
\index{UART\_DMA\_TX\_ENABLE@{UART\_DMA\_TX\_ENABLE}!UART DMA Tx@{UART DMA Tx}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_DMA\_TX\_ENABLE}{UART\_DMA\_TX\_ENABLE}}
{\footnotesize\ttfamily \label{group___u_a_r_t___d_m_a___tx_gab1c3e8113617fb9c8fc63b3f3d7c8c65} 
\#define UART\+\_\+\+DMA\+\_\+\+TX\+\_\+\+ENABLE~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\+\_\+\+CR3\+\_\+\+DMAT}}}

UART DMA TX enabled 